Hi, This message is to report the mapper hardware used by a "52 Games" NES multi- game cartridge. Thanks to Richard Garey for the loan of this cartridge. The 52 Games mapper hardware is functionally identical to the 58-in-1/110-in-1 mapper which I described before. NOTE: I am am using mapper 225 = $E1 to denote the 58-in-1/110-in-1/52 Games mapper. I have extracted the selection menu code and included that in .nes format in this archive, so you can see what the selection menu looks like without having an emulator that supports this mapper. Hardware details ---------------- The 52 Games cartridge is made by SuperVision, who also made the 110-in-1 cartridge. The cartridge uses three 74-series ICs, HC273, LS670 and LS174, and a PAL16L8 for the mapping. Total PRG size is 8mbit, CHR size 4mbit. PRG data is contained in two ROMs, marked as follows: KM23C4000 KM23C4000 6000-881 6000-882 The CHR ROM is marked as follows: KM23C4000 6000-880 The PRG setup is quite interesting. Every pin of each PRG ROM is connected to the corresponding pin of the other PRG ROM. This must mean that the pinout differs slightly; specifically, in one ROM pin 22 is /CS, in the other it is CS. Mapper description ------------------ - Like most other mappers, switching is achieved by writing to addresses $8000- $FFFF. - However, unlike most other mappers the value written is irrelevant. It is the address written to which is relevant. It looks something like this: A15 A14|A13|A12|A11 A10 A9 A8 A7| A6| A5 A4 A3 A2 A1 A0 -------+---+---+-------------------+---+----------------------- 1 - | m | s | p p p p p |h/l| c c c c c c A14 is unused in the 52 Game cartridge (it is used in the 110-in-1, which is double the size) A13 sets mirroring. 0: PA10 connected to VRAM A10. Horizontal scrolling, "vertical mirroring" 1: PA11 connected to VRAM A10. Vertical scrolling, "horizontal mirroring" (I was unable to conclusively confirm this for the 52 Games cartridge.) A12 sets PRG page size. 0: 32Kb 1: 16Kb A11-A7 select the 32Kb PRG-ROM page. A11 is the most significant bit. A6 is used if the page size is 16Kb. It determines whether the upper or lower half of the chosen 32Kb PRG page is used (appearing at both $8000 and $C000). 0: lower, 1: upper. It is unused if game PRG size is 32Kb (i.e., if A12 is 0). A5-A0 set the 8Kb CHR-ROM page. A5 is the most significant bit. At power-on time, the mapper functions as if a write to $8000 has just occurred. This means: 32K page size, PRG page 0, CHR page 0, vertical mirroring. (Well, this seems to be true for the PRG and CHR pages, probably true for mirroring. Not that it matters, since the first instruction executed sets the mirroring.) In addition, this mapper implements four 4-bit registers. These are accessed by reading/writing in the region $5800-$5FFF. A0 & A1 select which register to access, and D0-D3 is the value to write or read. For example: - writing $F6 to address $5800 sets register 0 to 6. - writing $A9 to address $5801 sets register 1 to 9. - writing $0C to address $5DCB sets register 3 to $C. (That is, register 0 is accessed at $5800, $5804, $5808, ..., $5FFC, for example.) Reading from the registers, the register value is returned in D0-D3 (i.e. the low 4 bits of the data bus). What is on the upper bits is undefined; in practice it may be whatever value was last there (the last instruction byte read perhaps). At power-on time, all four registers seem to contain $F. When the user presses Reset, nothing out of the ordinary should happen; just jump to the address that the reset vector points to as normal. The selection menu must use the 4-bit registers to store the last-selected game. Pressing reset returns to the menu, with the last-played game highlighted. -- Mark