Andy Simpson's NES documentation.
With thanks and credit to Marat Fayzullin


This doc is based upon Marat Fazullin's NES faq (in fact this is almost a template of
Marat's file). Its purpose is to satisfy the general populous who mail me asking to
explain/clarify/add to the info Marat has provided. Hence, this file:-

Alrighty then! Let's get a moving!


Note: Most figures here are taken from Marat Fayzullin's NES doc. This is taken on
trust that they are correct. If any prove to be inaccurate (which I doubt) then updates
will be made in the future, after I've checked them.


Q) What is a NES?

A) The NES (Nintendo Entertainment System) is an 8-bit gaming console, popular in
the 1980s, mainly due to its phenomenal software base. The NES was known as
Famicom (FAMily COMputer) in Japan.


Q) Ok, so give me some NES stats!

A) The NES is based on the following:-

The video memory required by the PPU is SEPARATED from the main memory
of the CPU. It can be read or written to via ports.
ROM images (or NES cartridges for those of you with the actual console) can
contain:-

Sim's hint - It's a good tip to treat unfamiliar images as if they utilise locations
$6000-7FFF. When programming SimNES, many supposedly "compatible" images
turned out to require further work through ignorance of the above.


Q) How can the NES CPU be mapped out?

A) Though use of this reference chart!

CPU Table



Q) NES and interrupts. Do I wanna know about them?

A) Yeah! And anyway, I wanna tell you!

The NES uses NMIs which are, to give them their full name, Non Maskable
Interrupts
. The NES PPU generates a non-maskable interrupt at the end of each
frame. These are most commonly known as VBLANK interrupts.

Sim's tip:- If a ROM suffers from constant background or sprite graphic glitching, it
is usually because the VBLANK interrupts are not set at an acceptable "level" for that
ROM. Games such as Rad Racer and TMNT (both SimNES compatible!) demand fine
tweaking in this area if they are to co-operate aesthetically. Phew! Layman's terms,
eh?


Enabling or disabling of VBLANK interrupts can be achieved by writing into
location $2000, bit 7. Upon occurance of an interrupt, the return address/status
register are pushed on stack and the CPU jumps to the address at location
$FFFA. The interrupt handler is supposed to finish its execution with an RTI
command returning the CPU to the main program (but let's face it, that goes
without saying).


Q) PPU memory. I love it unrequitedly. How do I make it love me back?

A) Pattern tables! My favourite! Ok, to tame PPU, you have to know how and when
to read or write to them. This is the basis of understanding, see?

Note: The BG colour of the picture is defined by locations $3F00 and $3F10 in
VRAM. The locations actually mirror each other (ie they are the same memory cell,
the siamese twins of the NES world, if you like.)



Q) How do I write to PPU memory?

A) Firstly write both the upper and lower address bytes into location $2006. Data should be written to location $2007. Each time data is written, the address will increase by 1 (ie bit 2 of $2000 is 0) or by 32 (ie bit 2 this time is 1).


Q) How do I read from PPU?

A) Presuming you have written the upper and lower address bytes into $2006 (which
you will have, if you want this to work!) then data can be read from location $2007.
Each time data is read, the output address will increase by 1.

(Continued next update, techie dudes!)


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